Integration of Passive RF Front End Components in SoCs

Table of Contents

• 1. Introduction to highly integrated and tunable RF receiver front ends:
• 1.1. Introduction
• 1.2. Front-end integration challenges and system requirements
• 1.3. 2G receiver SAW elimination
• 1.4. 3G receiver SAW elimination
• 1.5. Summary and conclusions
• 2. Active blocker-cancellation techniques in receivers:
• 2.1. Introduction
• 2.2. Concept of receiver translational loop
• 2.3. Nonideal effects
• 2.4. Circuit implementations
• 2.5. Measurement results
• 2.6. Feedback blocker-cancellation techniques
• 2.7. Summary and conclusions
• 3. Impedance transformation: Introduction to the simplest on-chip SAW filter
• 3.1. Introduction
• 3.2. Impedance transformation by a 50% passive mixer
• 3.3. Application as on-chip SAW filter
• 3.4. Impact of harmonics on the sharpness of the proposed filter
• 3.5. Differential implementation
• 3.6. Summary and conclusions
• 4. Four-phase high-Q bandpass filters:
• 4.1. Introduction
• 4.2. Impedance transformation by a four-phase filter
• 4.3. Differential implementation of four-phase high-Q bandpass filter
• 4.4. Application as an on-chip SAW filter
• 4.5. Impact of harmonics on the sharpness of the proposed filter
• 4.6. Four-phase high-Q bandpass filter with a complex baseband impedance
• 4.7. Four-phase high-Q bandpass filter with quadrature RF inputs
• 4.8. Harmonic upconversion and downconversion
• 4.9. A SAW-less receiver with on-chip four-phase high-Q bandpass filters
• 4.10. Summary and conclusions
• 5. M-phase high-Q bandpass filters:
• 5.1. Introduction
• 5.2. Impedance transformation by M-phase filters
• 5.3. Differential implementation of M-phase high-Q filter
• 5.4. Application as an on-chip SAW filter
• 5.5. Impact of harmonics on the sharpness of the M-phase bandpass filter
• 5.6. M-phase high-Q filter with complex baseband impedances
• 5.7. M-phase high-Q bandpass filter with quadrature RF inputs
• 5.8. M-phase high-Q bandpass filter with N-phase complex bandpass filters
• 5.9. Harmonic upconversion
• 5.10. Summary and conclusions
• 6. Design of a superheterodyne receiver using M-phase filters:
• 6.1. Introduction
• 6.2. Proposed superheterodyne receiver architecture
• 6.3. Design and implementation of the receiver chain
• 6.4. Measurement results
• 6.5. Summary and conclusions
• 7. Impact of imperfections on the performance of M-phase filters:
• 7.1. Introduction
• 7.2. Mathematical background
• 7.3. LO phase noise
• 7.4. Second-order nonlinearity in the switches of the bandpass filter
• 7.5. Quadrature error in the original 50% duty-cycle clock phases
• 7.6. Harmonic downconversion
• 7.7. Thermal noise of switches
• 7.8. Parasitic capacitors of switches
• 7.9. Switch charge injection
• 7.10. Mismatches
• 7.11. Summary and conclusions
• 8. M-phase filtering and duality:
• 8.1. Introduction
• 8.2. Dual of an electrical circuit
• 8.3. Dual of M-phase filter
• 8.4. Dual of M-phase high-Q filter with complex baseband impedances
• 8.5. Summary and conclusions
• Appendix
• References
• Index.
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