Computer Architecture and Implementation
In this textbook Harvey Cragon provides a clear introduction to computer architecture and implementation. He interweaves two important themes throughout: the major concepts and design philosophies of computer architecture and organization, and analytic modeling of computer performance. The author begins by describing the classic von Neumann architecture, and then details a number of performance models and evaluation techniques. He goes on to cover user instruction set design--including RISC architecture, pipelined processors, input/output techniques, queuing modes, and extended instruction set architectures. A unique feature of the book is its memory-centric approach--memory systems are discussed before processor implementations. Each topic is illustrated with reference to actual IBM and Intel architectures. The book contains many worked examples, 259 illustrations, and over 130 homework exercises. It is an ideal textbook for a one-semester undergraduate course in computer architecture and implementation.
- Concise yet detailed introduction to the essentials of computer architecture
- Illustrates key points with reference to real IBM and Intel computer systems
- Author is a member of the US National Academy of Engineering and a Fellow of the IEEE
- Includes unique coverage of Intel MMX technology
Reviews & endorsements
"this is a good book and would make a useful addition to more traditional computer architecture textbooks. Harvey Cragon's writing style is accessible and is bolstered by useful context-enhancing `nuggets' of background information scattered throughout the book." Measuring Science and Technology Oct 2001
Product details
October 2005Paperback
9780521657051
332 pages
254 × 178 × 18 mm
0.573kg
160 b/w illus. 95 tables 136 exercises
Available
Table of Contents
- Preface
- 1. Computer overview
- 2. Performance models and evaluation
- 3. User instruction set design
- 4. Memory systems
- 5. Processor control design
- 6. Pipelined processors
- 7. Input/output
- 8. Extended instruction set architectures.