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Enabling Technologies for 3-D Integration

Enabling Technologies for 3-D Integration

Enabling Technologies for 3-D Integration

Volume 970:
Christopher A. Bower, RTI International, North Carolina
Philip E. Garrou, IEEE Fellow, North Carolina
Peter Ramm, Fraunhofer Institute IZM, Munich
Kenji Takahashi, Toshiba Corporation, Japan
March 2007
970
Out of stock in print form with no current plan to reprint
Hardback
9781558999275
£29.99
GBP
Hardback
Paperback

    An emerging technology or device architecture called 3-D IC integration is based on the system performance gains that can be achieved by stacking and vertically interconnecting distinct device chips. The 3-D concept of replacing long 2-D interconnects with shorter vertical (3-D) interconnects has the potential to alleviate the well-known interconnect (RC) delay problem facing the semiconductor industry. Additional benefits of the 3-D concept for the IC maker include reduced die size and the ability to use distinct technologies (analog, logic, RF, etc…) on separate vertically interconnected layers. The 3-D concept, therefore, allows the integration of otherwise incompatible technologies, and offers significant advantages in performance, functionality, and form factor. Topics in this book include: fabrication of 3-D ICs; modeling, simulation and scaling of 3-D integrated devices; applications of 3-D integration; through wafer interconnects for 3-D packaging and interposer applications; bonding technology for 3-D integration; and enabling processes for 3-D integration.

    Product details

    March 2007
    Hardback
    9781558999275
    295 pages
    228 × 152 mm
    0.545kg
    Out of stock in print form with no current plan to reprint
      Editors
    • Christopher A. Bower , RTI International, North Carolina
    • Philip E. Garrou , IEEE Fellow, North Carolina
    • Peter Ramm , Fraunhofer Institute IZM, Munich
    • Kenji Takahashi , Toshiba Corporation, Japan